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  FDC6305N FDC6305N, rev. c FDC6305N dual n-channel 2.5v specified powertrench tm mosfet general description these n-channel low threshold 2.5v specified mosfets are produced using fairchild semiconductor's advanced powertrench process that has been especially tailored to minimize on-state resistance and yet maintain low gate charge for superior switching performance. applications ? load switch ? dc/dc converter ? motor driving features ? 2.7 a, 20 v. r ds(on) = 0.08 w @ v gs = 4.5 v r ds(on) = 0.12 w @ v gs = 2.5 v ? low gate charge (3.5nc typical). ? fast switching speed. ? high performance trench technology for extremely low r ds(on) . ? supersot tm -6 package: small footprint (72% smaller than standard so-8); low profile (1mm thick). ? 1999 fairchild semiconductor corporation absolute maximum ratings t a = 25c unless otherwise noted symbol parameter ratings units v dss drain-source voltage 20 v v gss gate-source voltage 8v i d drain current - continuous (note 1a) 2.7 a - pulsed 8 p d power dissipation for single operation (note 1a) 0.96 w (note 1b) 0.9 (note 1c) 0.7 t j , t stg operating and storage junction temperature range -55 to +150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a) 130 c/w r q jc thermal resistance, junction-to-case (note 1) 60 c/w package outlines and ordering information device marking device reel size tape width quantity .305 FDC6305N 7 8mm 3000 units march 1999 1 5 3 2 6 4 d1 s2 g1 d2 s1 g2 supersot -6 tm
FDC6305N FDC6305N, rev. c electrical characteristics t a = 25c unless otherwise noted s y mbol parameter test conditions min t yp max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 m a20 v d bv dss d t j breakdown voltage temperature coefficient i d = 250 m a, referenced to 25 c14mv/ c i dss zero gate voltage drain current v ds = 16 v, v gs = 0 v 1 m a i gssf gate-body leakage current, forward v gs = 8 v, v ds = 0 v 100 na i gssr gate-body leakage current, reverse v gs = -8 v, v ds = 0 v -100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 m a 0.4 0.9 1.5 v d v gs(th) d t j gate threshold voltage temperature coefficient i d = 250 m a, referenced to 25 c-2.7 mv/ c r ds(on) static drain-source on-resistance v gs = 4.5, i d = 2.7 a v gs = 4.5 i d = 2.7 a, t j = 125 c v gs = 2.5 v, i d = 2.2 a 0.060 0.095 0.085 0.080 0.128 0.120 w i d(on) on-state drain current v gs = 4.5 v, v ds = 5 v 6 a g fs forward transconductance v ds = 5 v, i d = 2.7 a 8 s dynamic characteristics c iss input capacitance 310 pf c oss output capacitance 80 pf c rss reverse transfer capacitance v ds = 10 v, v gs = 0 v, f = 1.0 mhz 40 pf switching characteristics (note 2) t d(on) turn-on delay time 5 15 ns t r turn-on rise time 8.5 17 ns t d(off) turn-off delay time 11 20 ns t f turn-off fall time v dd = 10 v, i d = 1 a, v gs = 4.5 v, r gen = 6 w 310ns q g total gate charge 3.5 5 nc q gs gate-source charge 0.55 nc q gd gate-drain charge v ds = 10 v, i d = 2.7 a, v gs = 4.5 v 0.95 nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current 0.8 a v sd drain-source diode forward voltage v gs = 0 v, i s = 0.8 a (note 2) 0.77 1.2 v notes: 1. r q ja is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mou nting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. both devices are assumed to be operating and sharing the dissipated heat energy equally. scale 1 : 1 on letter size paper 2. pulse test: pulse width 300 m s, duty cycle 2.0% a) 130 c/w when mounted on a 0.125 in 2 pad of 2 oz. copper. b) 140 c/w when mounted on a 0.005 in 2 pad of 2 oz. copper. c) 180 c/w on a minimum mounting pad.
FDC6305N FDC6305N, rev. c typical characteristics figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. 0.6 0.8 1 1.2 1.4 1.6 -50-25 0 255075100125150 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistance i d = 2.7a v gs = 4.5v 0 0.04 0.08 0.12 0.16 0.2 0.24 12345 v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = 1.4a t a = 125 o c t a = 25 o c 0 2 4 6 8 10 01234 v gs , gate to source voltage (v) i d , drain current (a) t a = -55 o c 25 o c 125 o c v ds = 5v 0.0001 0.001 0.01 0.1 1 10 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , body diode forward voltage (v) i s , reverse drain current (a) t a = 125 o c 25 o c -55 o c v gs = 0v 0 2 4 6 8 10 00.511.522.53 v ds , drain to source voltage (v) i d , drain current (a) v gs = 4.5v 3.0v 2.5v 2.0v 1.5v 3.5v 0.8 1 1.2 1.4 1.6 0246810 i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs = 2.5v 4.0v 3.5v 4.5v 3.0v
FDC6305N FDC6305N, rev. c typical characteristics (continued) figure 7. gate-charge characteristics. figure 8. capacitance characteristics. figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1c. transient themal response will change depending on the circuit board design. 0.0001 0.001 0.01 0.1 1 10 100 300 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 r(t), normalized effective duty cycle, d = t / t 1 2 r (t) = r(t) * r r = 180c/w q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 0 1 2 3 4 5 00.511.522.533.54 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 2.7a v ds = 5v 10v 15v 0 100 200 300 400 500 0 4 8 12 16 20 v ds , drain to source voltage (v) capacitance (pf) c iss c rss c oss f = 1mhz v gs = 0 v 0.01 0.1 1 10 0.1 1 10 100 v ds , drain-source voltage (v) i d , drain current (a) dc 1s 100ms 10ms 1ms 100 m s r ds(on) limit v gs = 4.5v single pulse r q ja = 180 o c/w ta = 25 o c 0 1 2 3 4 5 0.01 0.1 1 10 100 1000 single pulse time (sec) power (w) single pulse r q ja = 180 o c/w t a = 25 o c
trademarks acex? coolfet? crossvolt? e 2 cmos tm fact? fact quiet series? fast ? fastr? gto? hisec? the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. tinylogic? uhc? vcx? isoplanar? microwire? pop? powertrench qfet? qs? quiet series? supersot?-3 supersot?-6 supersot?-8 ? www.fairchildsemi.com


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